1. Field of the Invention
The present invention relates generally to semiconductor integrated circuits. More specifically, the present invention relates to differential voltage regulators used in semiconductor devices
2. Description of the Related Art
A semiconductor device may be designed for any of a wide variety of applications. Typically, the device includes logic circuitry to receive, manipulate or store input data. The circuitry subsequently generates the same or modified data at an output terminal of the device. Depending on the type of semiconductor device or the circuit in which it is used, the device typically includes circuits which provide internal power signals that are regulated to be substantially independent of fluctuations in the externally generated power input signal.
An example of a data storage or memory device having such internal power signal circuits is the DRAM (dynamic random access memory). Conventionally, the DRAM receives an external power signal (VCCX) having a voltage intended to remain constant, for example, at 4.5 volts measured relative to ground. Internal to the DRAM, the power regulation circuit maintains an internal operating voltage signal (VCC) at a designated level, for example, 2.5 volts. Ideally, VCC linearly tracks VCCX from zero volts to the internal operating voltage level, at which point VCC remains constant as VCCX continues to increase in voltage to the designated VCCX level.
DRAMs also typically include a regulated constant pumped supply voltage (VCCP) which is greater than VCC, for example, four volts. Conventionally, the pumped voltage drives the word lines of a DRAM. The DRAM has memory arrays comprising a number of intersecting row and column lines of individual transistors or memory cells. The pumped voltage needs to be greater than VCC to ensure that memory access operations, such as a memory cell read or a memory cell write, are performed both completely and quickly. Ideally, VCCP does not fluctuate. If VCCP is too high, damage to the memory cells may result. If it is too low, the memory chip may have poor data retention or may otherwise operate incorrectly. Depending on the type of memory device, the device may include a second circuit for providing this internal regulated pumped power signal.
Previously implemented CMOS (complementary metal-oxide semiconductor) power regulation circuits for regulating VCCP include an input stage comprising a series of diodes and an inverter circuit having a xe2x80x9ctrip pointxe2x80x9d to trigger the point at which the inverter circuit activates the charge pump for VCCP. The series of diodes, which are implemented through a combination of PMOS/NMOS (p-channel MOS/n-channel MOS) transistors, are used to translate the VCCP signal down to the input trip point range for controlling the inverter circuit. The inverter circuit provides an output signal which drives an amplifier (implemented as a series of inverters) to bring the output signal to full CMOS levels.
Semiconductor devices are typically tested extensively by the manufacturer at pre-set voltage levels prior to shipping. These tests are performed under controlled conditions and high VCCP voltage levels may be used to ensure the devices are operating properly. However, some customers may choose to perform their own reliability tests on the devices once they are received. Because the customers"" tests are not always performed under the proper conditions, high VCCP voltage levels used during these tests may damage the semiconductor devices due to over-stress. The damaged devices will then fail the reliability tests, even though the device was operating properly when shipped.
What is desired is a circuit that generates a high VCCP voltage level on a semiconductor device for use during testing by the manufacturer, but then limits the VCCP voltage level the circuit generates once the device is shipped. This prevents a customer from inadvertently damaging the device by applying an over-voltage outside of controlled conditions.
The present invention involves limiting the supply voltage of a semiconductor device after the manufacturer""s testing is complete. The testing of the semiconductor device is accomplished under controlled conditions. A voltage control circuit limits the maximum supply voltage to a first level during testing of the device using a plurality of voltage regulation devices. The maximum supply voltage available during testing is high enough to cause damage to the semiconductor device if the voltage is applied under non-controlled conditions. To prevent a customer from damaging the semiconductor device, the voltage control circuit reduces the maximum supply voltage to a non-harmful level prior to shipping. This allows the customer to perform its own reliability tests without damaging the device. The voltage control circuit uses fuses to limit the maximum supply voltage. After the manufacturer""s testing is completed, the maximum supply voltage is limited by blowing fuses to bypass some of the voltage regulation devices.
One aspect of the invention is a voltage control circuit which provides a test supply voltage during manufacturing and testing of a semiconductor device and which provides an operational supply voltage after certification of the semiconductor device. The operational supply voltage is lower than the test supply voltage. The voltage control circuit includes a clamp circuit having a plurality of voltage regulation devices. The voltage regulation devices control a clamping threshold of the clamp circuit. A voltage regulator is electrically coupled to the clamp circuit and generates a first control signal responsive to the clamping threshold of the clamp circuit. A charge pump then receives the control signal from the voltage regulator, and, based on the value of the control signal, the charge pump generates the test supply voltage. At least one bypass device is connected to at least one of the plurality of voltage regulation devices. The bypass device is activated following the certification of the semiconductor device. Once activated, the bypass device bypasses the respective voltage regulation device from the clamp circuit to lower the clamping threshold of the clamp circuit. The voltage regulator then generates a second control signal responsive to the lowered clamping threshold of the clamp circuit. The second control signal is provided to the charge pump to generate the operational supply voltage. In one embodiment, the plurality of voltage regulation devices comprise diodes, which may be implemented through transistors. The bypass device may include a fuse.
Another aspect of the invention is a method of providing a first supply voltage on a semiconductor device during a first period and a second supply voltage during a second period. The method comprises the steps of providing a plurality of voltage control elements and establishing a first voltage control signal from the voltage control elements. The first supply voltage is then generated from the first voltage control signal. The method further comprises bypassing at least one of the voltage control elements and establishing a second voltage control signal from the voltage control elements which are not bypassed. The second supply voltage is then generated from the second voltage control signal. The first supply voltage has a voltage magnitude greater than the second supply voltages.
Another aspect of the invention is a voltage control circuit comprising a plurality of voltage regulation devices which limit an output voltage generated from an input voltage. A voltage regulation circuit receives the output voltage and generates a corresponding control signal. A charge pump receives the control signal and adjusts the voltage of a supply voltage based on the control signal. At least one voltage limiting device is coupled to a corresponding voltage regulation device. Each voltage limiting device is capable of selectively bypassing a corresponding voltage regulation device to further limit the output voltage, thereby reducing the voltage of the supply voltage.
Another aspect of the invention is a method of controlling a supply voltage in a semiconductor device. The method comprises the steps of providing an input voltage to a voltage regulator and establishing a target voltage of the input voltage. A reference voltage is adjusted when the input voltage reaches the target voltage. The method further comprises setting a control signal based on the reference voltage and generating the supply voltage based on the control signal. The target voltage is then decreased to limit the voltage level of the supply voltage.
Another aspect of the invention is a voltage control circuit which provides a test supply voltage during manufacturing and testing of a semiconductor device and an operational supply voltage after certification of the semiconductor device. The operational supply voltage is lower than the test supply voltage. The voltage control circuit comprises means for controlling an output of a clamp circuit and means for generating a first control signal based upon the output of the clamp circuit. The voltage control circuit further comprises a means for generating the test supply voltage and a means for limiting the output of the clamp circuit. A means for generating a second control signal is based upon the limited output of the clamp circuit. The limited output of the clamp circuit is then used to generate the operational supply voltage.